Electrostatic discharge protection circuits and semiconductor circuits
US11296503B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2020 |
| Grant date | Apr 5, 2022 |
| Priority date | — |
| Expiry date | Dec 29, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/60
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An electrostatic discharge protection (ESD) circuit is provided for a semiconductor element. The semiconductor element includes first and second drain/source electrodes and is surrounded by a deep well region. The ESD circuit includes a first control circuit and a first discharge circuit. The first control circuit is electrically connected between the first drain/source electrode and a power terminal and includes a first control terminal electrically connected to the deep well region and generates a first control signal. The first discharge circuit is controlled by the first control signal. When an electrostatic discharge event occurs on the first drain/source electrode, the first control circuit generates the first control signal according to potential states of the deep well region and the first drain/source electrode, and the first discharge circuit provides a first discharge path between the first drain/source electrode and the power terminal according to the first control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.