Patent · US Active

Phase clock performance improvement for a system embedded with GNSS receiver

US11300688B2 · kind B2 · utility

0Cited by
7References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 26, 2020
Grant dateApr 12, 2022
Priority date
Expiry dateAug 29, 2040

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG04R20/02
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

Systems and methods of storing phase history, and enhancing and restoring phase accuracy for a embedded Global Navigation Satellite System (GNSS) receiver include storing a phase history of the GNSS receiver output; determining an expected value of phase of the GNSS receiver output based on the phase history; and, responsive to a degradation of the GNSS receiver output, adjusting the GNSS receiver output utilizing the expected value of phase. The systems and method can further include, responsive to degradation being a loss of the GNSS receiver output, utilizing a holdover output from a physical frequency reference and with a phase adjusted based on the expected value of phase, and, responsive to the variation, utilizing the phase history to re-generate the GNSS receiver output for performance enhancement.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.