Interface discovery between partitions of a programmable logic device
US11301415B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 4, 2018 |
| Grant date | Apr 12, 2022 |
| Priority date | — |
| Expiry date | Apr 10, 2040 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Systems, methods, and devices for enhancing the flexibility of an integrated circuit device with partially reconfigurable regions are provided. For example, a discovery interface may determine and/or communicate a suitable logical protocol interface to control data transfer between regions on the integrated circuit device. The techniques provided herein result in more flexible partial reconfiguration options to enable greater compatibility between accelerator hosts and accelerator function units.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.