Patent · US Active

Using programmable switching chips as artificial neural networks engines

US11301751B2 · kind B2 · utility

0Cited by

0References

18Claims

0Family size

Assignee

NEC CORPORATION · JP

Inventors

Roberto Bifulco · Heidelberg, DE
Giuseppe Siracusano · Roma, IT

Key dates

Filing date	Oct 4, 2017
Grant date	Apr 12, 2022
Priority date	—
Expiry date	Feb 11, 2041

Classification

Technology area (CPC G)Physics
CPC primaryG06N3/0499
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A method for executing a binarized neural network (BNN) using a switching chip includes describing an artificial neural network application in a binarized form to provide the BNN; configuring a parser of the switching chip to encode an input vector of the BNN in a packet header; configuring a plurality of match-action tables (MATs) of the switching chip to execute, on the input vector encoded in the packet header, one or more of the operations including XNOR, bit counting, and sign operations such that the plurality of MATs are configured to: implement a bitwise XNOR operation between the input vector and a weights matrix to produce a plurality of first stage vectors, implement an algorithm for counting a number of bits set to 1 in the plurality of first stage vectors to produce a plurality of second stage vectors, and implement a sign operation on the second stage vectors.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.