System, method, and target for wafer alignment
US11302030B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 5, 2021 |
| Grant date | Apr 12, 2022 |
| Priority date | — |
| Expiry date | Jan 5, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N23/56
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A wafer alignment system includes an imaging sub-system, a controller, and a stage. The controller receives image data for reference point targets and determines a center location for each of the reference point targets. The center location determination includes identifying sub-patterns within a respective reference point target and identifying multiple center location candidates for the respective reference point target. The step of identifying the multiple center location candidates for the respective reference point target includes: applying a model to each identified sub-pattern of the respective reference point target, wherein the model generates a hotspot for each sub-pattern that identifies a center location candidate for the respective reference point target. The controller is further configured to determine a center location for the respective reference point target based on the multiple center location candidates and determine an orientation of the wafer based on the center location determination for the reference point targets.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.