Methods of forming a capacitor, semiconductor device, and fine pattern, and semiconductor device formed by the methods
US11302698B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2020 |
| Grant date | Apr 12, 2022 |
| Priority date | — |
| Expiry date | Mar 25, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/315
Abstract
A semiconductor device includes a transistor on a semiconductor substrate including a first area and a second area, and having a gate structure and an impurity area, a first interlayer insulating film covering the transistor, and having a contact plug electrically connected to the impurity area, a capacitor including a lower electrode on the first interlayer insulating film in the second area and electrically connected to the contact plug, a dielectric film coating a surface of the lower electrode, and an upper electrode on the dielectric film, and a support layer in contact with an upper side surface of the lower electrode to support the lower electrode, and extending to the first area, in which the support layer has a step between the first area and the second area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.