Miniature field plate T-gate and method of fabricating the same
US11302786B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 27, 2020 |
| Grant date | Apr 12, 2022 |
| Priority date | — |
| Expiry date | Mar 15, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/149
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a gate with a mini field plate includes forming a dielectric passivation layer over an epitaxy layer on a substrate, coating the dielectric passivation layer with a first resist layer, etching the first resist layer and the dielectric passivation layer to form a first opening in the dielectric passivation layer, removing the first resist layer, and forming a tri-layer gate having a gate foot in the first opening, a gate neck extending from the gate foot, and a gate head extending from the gate neck. The gate foot has a first width, and the gate neck has a second width that is wider than the first width. The gate neck extends for a length over the dielectric passivation layer on both sides of the first opening. The gate head has a third width wider than the second width of the gate neck.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.