Manufacturing method of via-hole connection structure, array substrate and manufacturing method thereof, display device and manufacturing method thereof
US11302869B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 26, 2018 |
| Grant date | Apr 12, 2022 |
| Priority date | — |
| Expiry date | Jan 4, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/1201
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A manufacturing method of a via-hole connection structure, a manufacturing method of an array substrate and an array substrate are provided by the embodiments of the present disclosure, and the manufacturing method of the via-hole connection structure includes: forming an insulation layer on a base substrate and forming a first via hole in the insulation layer; forming a connection portion in the first via hole; forming a protection layer covering the connection portion on a surface of the insulation layer; forming a second via hole in the insulation layer and in the protection layer; removing at least a portion of the protection layer to expose the connection portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.