Flip-flop

US11303267B2 · kind B2 · utility

Assignees

• Semiconductor Manufacturing International (Shanghai) Corporation · CN
• Semiconductor Manufacturing International (Beijing) Corporation · CN

Inventors

• Yan Cai · Stoughton, US
• Kai Hua Hou · Shanghai, CN
• Yuan Chai · Shanghai, CN
• Jian Chen · Shanghai, CN
• Jun Wang · Nanjing, CN

Key dates

• Filing date: Sep 10, 2020
• Grant date: Apr 12, 2022
• Expiry date: Sep 10, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03K5/1504
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

A flip-flop is provided. The flip-flop includes: a first inverter including an input terminal to receive data signal and an output terminal coupled to an input terminal of the master latch, a second inverter, a master latch including an output terminal coupled to an input terminal of a slave latch, and the slave latch including an output terminal coupled to an input terminal of the second inverter. An output terminal of the second inverter is configured as an output terminal of the flip-flop. A duration of the first clock signal inputted to the master latch is greater than a duration of the first clock signal inputted to the slave latch. A duration of the second clock signal inputted to the master latch is greater than a duration of the second clock signal inputted to the slave latch.