Techniques for measuring slew rate in current integrating phase interpolator
US11303282B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 21, 2021 |
| Grant date | Apr 12, 2022 |
| Priority date | — |
| Expiry date | Jul 21, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/033
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus is described and includes a current integrating phase interpolator core having a programmable bias current; an inverter circuit coupled to an output of the current integrating phase interpolator core for receiving a signal comprising a periodic sawtooth waveform therefrom; a digital-to-analog (D/A) converter for setting an input common mode voltage of the inverter circuit; a duty cycle measurement (DCM) circuit for measuring a duty cycle distortion (DCD) of a clock signal output from the inverter circuit; and a circuit for computing a difference between a first state of the DCD of the clock signal corresponding to the input common mode voltage of the inverter circuit being set to a high voltage and a second state of the DCD of the clock signal corresponding to the input common mode voltage of the inverter circuit being set to a low voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.