Patent · US Active

Phase locked loop switching in a communication system

US11303426B2 · kind B2 · utility

1Cited by

0References

17Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Roy Amel · Haifa, IL
Eran Segev · Pasadena, US
Shahar Gross · Nes Ziona, IL

Key dates

Filing date	Sep 29, 2017
Grant date	Apr 12, 2022
Priority date	—
Expiry date	Oct 30, 2037

Classification

Technology area (CPC H)Electricity
CPC primaryH04W84/12
WIPO fieldDigital communication
WIPO sectorElectrical engineering

Abstract

An apparatus include a baseband processor configured to receive digital samples of a first wireless local area network (WLAN) signal demodulated with a first phase locked loop (PLL). The baseband processor is configured to determine whether to switch from using the first PLL to demodulate the first WLAN signal to a second PLL to demodulate the first WLAN signal. The apparatus further includes a selection circuit coupled to the first PLL and the second PLL. The selection switch is configured to switch from the first PLL to the second PLL based on the determination. The baseband processor is configured to receive additional digital samples of the first WLAN signal demodulated with the second PLL.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.