Fault-tolerant T-gates via quasiprobability decomposition
US11308252B1 · kind B1 · utility
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Key dates
| Filing date | Nov 13, 2020 |
| Grant date | Apr 19, 2022 |
| Priority date | — |
| Expiry date | Nov 13, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques that combine quantum error correction and quantum error mitigation are used to simulate a fault-tolerant T-gate with low sampling overhead using the quasiprobability decomposition method. In some embodiments, the T-gate can be simulated using two logical bits and a magic state preparation that mitigates the need for magic state distillation and consequently has a low sampling overhead. Alternatively, the T-gate can be simulated based on code deformation performed on the surface code. Noise is removed from the T-gate using quasiprobability decomposition based on a learned logical error rate.
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