Multiple display synchronization
US11308919B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 23, 2019 |
| Grant date | Apr 19, 2022 |
| Priority date | — |
| Expiry date | May 23, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2370/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A device (100) includes a plurality of display panels (102), a plurality of display controllers (116), each display controller of the plurality of display controllers being configured to control a corresponding display panel of the plurality of display panels, each respective display controller of the plurality of display controllers being configured to generate a timing indication (134), and a processor (136) coupled to the plurality of display controllers to receive the timing indications from the plurality of display controllers. Each timing indication is indicative of the respective display controller residing in a state ready for refresh of the corresponding display panel. The processor is configured to delay a refresh of the plurality of display panels until the timing indication is received from each respective display controller of the plurality of display controllers to synchronize the plurality of display panels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.