Mechanism to improve driver capability with fine tuned calibration resistor
US11309004B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 3, 2021 |
| Grant date | Apr 19, 2022 |
| Priority date | — |
| Expiry date | May 3, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/75
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Aspects of a storage device including a controller, a calibration resistor and a die having an output driver and a calibration circuit are provided, which allow for an output impedance of the output driver to be calibrated to a lower impedance than a minimum required for reading data across PVT variations of the die at maximum loading of the controller. To check whether slow corners may operate using the lower impedance, the controller determines whether the output impedance of the output driver can be calibrated to the lower impedance at a maximum temperature and minimum voltage applied to the die, or whether a calibration code generated from the calibration circuit exceeds a threshold at a nominal temperature and voltage applied to the die. Thus, slow corners are screened out from lower impedance use, while faster devices are designed with a smaller calibration resistance to benefit from increased memory and speed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.