Convolution operation method based on NOR flash array
US11309026B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 25, 2017 |
| Grant date | Apr 19, 2022 |
| Priority date | — |
| Expiry date | Aug 18, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to the field of semiconductor integrated circuits and manufacturing technologies thereof, and discloses a method and device for realizing a convolution operation based on an NOR flash storage structure. The NOR flash array has a structure of an array composed of a plurality of NOR flash cells. The convolution operation method includes: storing elements of a convolution kernel matrix into the NOR flash cells; converting elements of an input matrix into voltages and applying the voltages to gate terminals of the NOR flash cells; applying a driving voltage to source terminals of the NOR flash cells; and collecting, via drain terminals of the NOR flash cells, current values of each column to obtain a convolution operation result.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.