Patent · US Active

All bit line sensing for determining word line-to-memory hole short circuit

US11309035B1 · kind B1 · utility

2Cited by

7References

20Claims

0Family size

Assignee

Western Digital Technologies, Inc. · US

Inventors

Liang Li · Shanghai, CN
Xiaohua Liu · Irvine, US
Qianqian Yu · Shanghai, CN

Key dates

Filing date	Nov 16, 2020
Grant date	Apr 19, 2022
Priority date	—
Expiry date	Nov 16, 2040

Classification

Technology area (CPC H)Electricity
CPC primaryH10B43/27
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Apparatuses and techniques for detecting short circuits in a memory device, and in particular, word line-to-channel short circuits and short circuits between bit line contacts at the top of NAND strings. A short circuit detection operation includes a channel pre-clean phase which discharges a channel of a non-short circuited NAND string while boosting a bit line of a short circuited NAND string, followed by a bit line pre-charge phase which boosts a bit line of the non-short circuited NAND string, followed by a bit line discharge phase which discharges the bit line of the non-short circuited NAND string, followed by a sensing phase which identifies the short circuited NAND strings as being in a programmed or non-conductive state.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.