Packaged semiconductor devices having enhanced thermal transport and methods of manufacturing the same
US11309228B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 22, 2020 |
| Grant date | Apr 19, 2022 |
| Priority date | — |
| Expiry date | Jul 28, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06562
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A packaged semiconductor device includes a package substrate, a first semiconductor device on the package substrate, and at least one second semiconductor device that extends on and partially covers the first semiconductor device. A heat dissipating insulation layer is provided as a coating on the first and second semiconductor devices. A conductive heat dissipation member is provided, which extends upwardly from the heat dissipating insulation layer and on portions of the first and second semiconductor devices. A protective member is provided on the package substrate, to cover the first and second semiconductor devices and the conductive heat dissipation member. This protective member includes a first covering portion, which covers an upper surface of the conductive heat dissipation member.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.