Chip on film structure and display device
US11309260B2 · kind B2 · utility
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8Claims
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Assignee
Inventor
Key dates
| Filing date | Sep 20, 2019 |
| Grant date | Apr 19, 2022 |
| Priority date | — |
| Expiry date | Aug 7, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10128
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A chip on film structure and a display device including chip on film structure, the chip on film structure including a film substrate including a body area, a plurality of traces, and a bonding area at opposite ends of the film substrate; at least one chip, the chip disposed in the body area through bonding and electrically connected to the display panel through the plurality of traces and the bonding area; and a guiding member disposed at one end of the film substrate connected to the display panel and covering the bonding area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.