Array substrate, manufacturing method thereof, and display module
US11309335B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 15, 2018 |
| Grant date | Apr 19, 2022 |
| Priority date | — |
| Expiry date | Jan 2, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/421
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides an array substrate, a method of fabricating the same, and a display module. The array substrate includes a substrate and a thin film transistor. An active layer of the thin film transistor includes: a first region including source and drain doped regions and a channel region; a second region surrounding at least a side of the channel region not in contact with the source and drain doped regions, and the first region forming a PN junction with the second region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.