Patent · US Active

Semiconductor device and fabrication method thereof

US11309420B2 · kind B2 · utility

0Cited by
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13Claims
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Key dates

Filing dateFeb 20, 2020
Grant dateApr 19, 2022
Priority date
Expiry dateApr 17, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/024
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

The present disclosure provides a semiconductor device and a fabrication method. The method includes: providing a substrate having fins and forming an initial gate structure across the fins, which covers a portion of a top surface and sidewall surfaces of the fins, and includes an initial first region and an initial second region on the initial first region. A bottom boundary of the initial second region is higher than the top surface of the fins, and a size of the initial first region is larger than a size of the initial second region. A first etching process is performed on sidewalls of the initial gate structure to form a gate structure, which includes a first region formed by etching the initial first region, and a second region formed by etching the initial second region. A size of the first region is smaller than a size of the second region.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.