Transistor and manufacturing method thereof, display substrate and display device
US11309428B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 6, 2019 |
| Grant date | Apr 19, 2022 |
| Priority date | — |
| Expiry date | Dec 24, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/1213
Abstract
The present disclosure provides a transistor and a manufacturing method thereof, a display substrate and a display device. The transistor includes: a base structure; an active layer on the base structure; and a gate electrode, a source electrode and a drain electrode that are all located on a side of the active layer distal to the base structure. The active layer includes a first region corresponding to an orthographic projection of the gate electrode on the base structure and a second region outside the orthographic projection. A surface of the base structure in contact with the active layer in the first region is not in the same plane as a surface of the base structure in contact with the active layer in the second region. The active layer in the first region has substantially the same thickness as a thickness of the active layer in the second region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.