Crystal oscillator and phase noise reduction method thereof
US11309835B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 4, 2021 |
| Grant date | Apr 19, 2022 |
| Priority date | — |
| Expiry date | May 4, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03B2200/009
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A crystal oscillator and a phase noise reduction method thereof are provided. The crystal oscillator may include a crystal oscillator core circuit, a first bias circuit and a phase noise reduction circuit, the first bias circuit is coupled to an output terminal of the crystal oscillator core circuit, and the phase noise reduction circuit is coupled to the output terminal of the crystal oscillator core circuit. In operations of the crystal oscillator, the crystal oscillator core circuit is configured to generate a sinusoidal wave. The first bias circuit is configured to provide a first voltage level to be a bias voltage of the sinusoidal wave. The phase noise reduction circuit is configured to reset the bias voltage of the sinusoidal wave in response to a voltage level of the sinusoidal wave exceeding a specific voltage range.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.