Array substrate and display panel
US11314132B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2019 |
| Grant date | Apr 26, 2022 |
| Priority date | — |
| Expiry date | Sep 9, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F2201/40
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An array substrate and a display panel are provided. The array substrate includes a substrate, a thin film transistor layer disposed on the substrate, and a pixel electrode layer disposed on the thin film transistor layer. The pixel electrode layer includes a plurality of pixel regions, and the pixel regions include a first pixel region and a second pixel region. A pixel electrode in the second pixel region is disposed along an outer boundary of the first pixel region, or a pixel electrode in the first pixel region is disposed along an outer boundary of the second pixel region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.