Power management chip and related driving method and driving system
US11315476B2 · kind B2 · utility
Inventors
Key dates
| Filing date | Nov 14, 2019 |
| Grant date | Apr 26, 2022 |
| Priority date | — |
| Expiry date | Dec 29, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0411
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure proposes a power management chip, a driving method, and a driving system. The power management chip includes a register, a signal receiving circuit configured to receive a second voltage data, and a processing circuit configured to examine the first voltage data and the second voltage data and write the second voltage data into the register when the first voltage data and the second voltage data are different. After the signal receiving circuit receives the second voltage data, the processing circuit examines the first voltage data and the second voltage data to prevent the first voltage data from being modified. This prevents the abnormality of the display and solves the above-mentioned problem of a conventional power management chip, whose data may be modified such that the display panel abnormally displays.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.