Semiconductor memory device
US11315950B2 · kind B2 · utility
3Cited by
6References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 15, 2020 |
| Grant date | Apr 26, 2022 |
| Priority date | — |
| Expiry date | Sep 15, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/693
Abstract
A semiconductor memory device includes a conducting layer and an insulating layer that are disposed above a semiconductor substrate, a plurality of pillars that extend in a direction which crosses a surface of the semiconductor substrate, and a plate that is disposed between the plurality of pillars and extends in the same direction as the pillars. A surface of the plate, which faces the pillars, has convex portions and non-convex portions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.