Buried tri-gate fin vertical gate structure and method for making the same

US11315969B2 · kind B2 · utility

Assignee

• Shanghai Huali Integrated Circuit Corporation · CN

Inventors

• Zhi Tian · Shanghai, CN
• Juanjuan Li · Shanghai, CN
• Hua Shao · Nanhu, CN
• Haoyu Chen · Hefei, CN

Key dates

• Filing date: Jul 30, 2020
• Grant date: Apr 26, 2022
• Expiry date: Oct 14, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10F39/807

Abstract

The present application provides a buried tri-gate fin vertical gate structure. Which includes a transfer transistor on an epitaxial layer; a photodiode in the epitaxial layer at one side of the transfer transistor. A reset transistor on the epi-layer includes N+ regions at both sides of its gate, one of the N+ regions forms a floating diffusion node. The bottom of the fin vertical gate protrudes into the epitaxial layer with a number of vertical portions. Thus, increased surface areas enhance charge motion at the bottom, combining large-area transfer at an upper layer by the vertical gate and quick transfer at the bottom by the FINFET, thereby improving photo response.