Display panel and display device having lower and upper through holes
US11316130B2 · kind B2 · utility
0Cited by
4References
10Claims
0Family size
Inventors
Key dates
| Filing date | Aug 28, 2019 |
| Grant date | Apr 26, 2022 |
| Priority date | — |
| Expiry date | Jan 6, 2040 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E10/549
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present invention provides a display panel. At least one first buffer layer is disposed between the base layer and the thin film transistor layer. At least one second buffer layer is disposed between the functional layer and the polarizer. The first buffer layer and the second buffer layer use hollow designs in the transparent displaying region and can reduce stress generated from cutting a hole, improve protection for the display panel and finally improve reliability of the display device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.