Methods of testing multiple dies
US11320478B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 15, 2020 |
| Grant date | May 3, 2022 |
| Priority date | — |
| Expiry date | Jun 19, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318511
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
In a method of testing a semiconductor wafer, a probe tip contacts a pad in a scribe line space between facing sides of first and second dies. The probe tip is electrically coupled to an automated test equipment (ATE). The second die is spaced apart from the first die. The scribe line space includes an interconnect extending along at least an entire length of the facing sides of the first and second dies. The pad is electrically coupled through the interconnect to at least one of the first or second dies. With the ATE, circuitry is tested in at least one of the first or second dies. The pad is electrically coupled through the interconnect to the circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.