In a microservices-based application, mapping distributed error stacks across multiple dimensions
US11321160B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 1, 2019 |
| Grant date | May 3, 2022 |
| Priority date | — |
| Expiry date | Nov 4, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F16/252
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of tracking errors in a system comprising microservices comprises ingesting a plurality of spans generated by the microservices during a given duration of time. The method further comprises consolidating the plurality of spans associated with the given duration of time into a plurality of traces, wherein each trace comprises a subset of the plurality of spans that comprise a common trace identifier. For each trace, the method comprises: a) mapping a respective trace to one or more error stacks computed for the respective trace and to one or more attributes determined for the respective trace; and b) emitting each error stack computed from the respective trace with an associated pair of attributes. The method then comprises reducing duplicate pairs of error stack and associated attributes and maintaining a count for each pair of error stack and associated attributes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.