Systems and methods for machine intelligence based malicious design alteration insertion

US11321510B2 · kind B2 · utility

Assignee

• University of Florida Research Foundation, INC. · US

Inventors

• Swarup Bhunia · Gainesville, US
• Prabuddha Chakraborty · Gainesville, US
• Abhishek Anil Nair · Gainesville, US
• Tamzidul Hoque · Gainesville, US
• Jonathan William Cruz · Gainesville, US
• Naren Vikram Raj Masna · Gainesville, US
• Pravin Dasharth Gaikwad · Gainesville, US

Key dates

• Filing date: Sep 29, 2020
• Grant date: May 3, 2022
• Expiry date: Sep 29, 2040

Classification

• Technology area (CPC G): Physics
• CPC primary: G06N3/088
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

Embodiments of the present disclosure provide methods, apparatus, and computer program products for generating an insertion netlist for a target circuit configured for inserting a malicious design alteration into the circuit based on a design identifying reference trigger nets. Features are extracted for each net identified in a netlist for the circuit. A set of reference trigger features is generated for each of the reference trigger nets. A net is selected from the netlist for each set of reference trigger features based on a similarity between the features of the net and the set of reference trigger features. The insertion netlist is generated that includes the circuit with the malicious design alteration inserted at each of the selected nets.