Signal line capacitance compensation circuit and display panel
US11322064B2 · kind B2 · utility
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2References
19Claims
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Key dates
| Filing date | Dec 13, 2019 |
| Grant date | May 3, 2022 |
| Priority date | — |
| Expiry date | Dec 13, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0223
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A signal line capacitance compensation circuit and a display panel are provided, a signal line capacitance compensation circuit includes: a plurality of signal lines; at least one control line, a compensation capacitor being provided between the control line and at least one of the plurality of signal lines; and a signal source configured to send a charging signal to one or more control lines of the at least one control line, the charging signal being used to charge the compensation capacitor between the one or more control lines receiving the charging signal and the at least one signal line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.