Method of processing a power semiconductor device
US11322587B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 13, 2020 |
| Grant date | May 3, 2022 |
| Priority date | — |
| Expiry date | Jun 13, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/117
Abstract
A power semiconductor device includes a control cell for controlling a load current. The control cell is electrically connected to a load terminal structure on one side and to a drift region on another side. The drift region includes dopants of a first conductivity type. The control cell includes: a mesa extending along a vertical direction and including: a contact region having dopants of the first conductivity type or of a second conductivity type and electrically connected to the load terminal structure, and a channel region coupled to the drift region; a control electrode configured to induce a conduction channel in the channel region; and a contact plug including a doped semiconductive material and arranged in contact with the contact region. An electrical connection between the contact region and load terminal structure is established by the contact plug, a portion of which projects beyond lateral boundaries of the mesa.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.