Semiconductor device having asymmetrical source/drain
US11322590B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 2020 |
| Grant date | May 3, 2022 |
| Priority date | — |
| Expiry date | Jul 14, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/834
Abstract
A semiconductor device includes a substrate, a first active fin on the substrate, the first active fin including a first side surface and a second side surface opposing the first side surface, a second active fin on the substrate, the second active fin including a third side surface facing the second side surface and a fourth side surface opposing the third side surface of the second active fin, a first isolation layer on the first side surface of the first active fin, a second isolation layer between the second side surface of the first active fin and the third side surface of the second active fin, a third isolation layer on the fourth side surface of the second active fin and a merged source/drain on the first and second active fins.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.