Computation units for functions based on lookup tables
US11327713B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 1, 2019 |
| Grant date | May 10, 2022 |
| Priority date | — |
| Expiry date | Jan 2, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F17/17
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computation unit comprises a floating point input having X bits including a sign bit, an E bit exponent and an M bit mantissa. A first circuit is operatively coupled to receive X-N bits of the input, including e1 bits of the exponent and ml bits of the mantissa, where e1≤E, and m1≤M, to output values over a first domain of the input. A second circuit is operatively coupled to receive X-K bits of the input, including e2 bits of the exponent, e2<e1, and m2 bits of the mantissa, m2>m1, to output values, over a second domain of the input. A range detector is operatively coupled to the input, to indicate a range in response to a value of the input. A selector can select the output of the first circuit or of the second circuit in response to the range detector.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.