Reduced processing loads via selective validation specifications
US11327746B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2020 |
| Grant date | May 10, 2022 |
| Priority date | — |
| Expiry date | Jun 24, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06Q10/101
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed are embodiments for reducing processing requirements in complex build environments. Complex build environments frequently perform multiple builds per day, in some cases, multiple builds are occurring in parallel. Some of these builds and some fail. Moreover, a definition of success or failure of a build can vary across individual engineers or teams of engineers. In a complex build environment that is rapidly generating multiple build results simultaneously, identifying which builds are appropriate for use can be difficult. Many teams solve this problem by increasing a frequency of builds to rapidly detect any problems with documents recently checked into a document repository. However, this relatively high frequency of builds can impose large processing and/or cost burdens on an organization. By providing sophisticated methods of extracting validation information from existing builds, the disclosed embodiments reduce processing requirements and improved efficiency of enterprise build environments.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.