Display device capable of high-speed charging/discharging and switching scanning order of gate bus lines
US11328682B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 9, 2021 |
| Grant date | May 10, 2022 |
| Priority date | — |
| Expiry date | Apr 9, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C19/28
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate driver is constituted of a first gate driver including a first shift register that is configured by bistable circuits corresponding to gate bus lines on odd-numbered lines arranged on one side of a display portion, and a second gate driver including a second shift register that is configured by bistable circuits corresponding to gate bus lines on even-numbered lines arranged on another side of the display portion. A first buffer circuit is provided on one end side of each gate bus line, and a second buffer circuit is provided on another end side of each gate bus line. A control signal for controlling the scanning order of the gate bus line is given to the bistable circuit and the second buffer circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.