Patent · US Active

Semiconductor devices and methods of manufacturing the same

US11329137B2 · kind B2 · utility

0Cited by
6References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 13, 2020
Grant dateMay 10, 2022
Priority date
Expiry dateOct 28, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/667

Abstract

A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a substrate; an isolation layer in a first trench, defining an active region of the substrate; a gate structure in a second trench intersecting the active region; and first and second impurity regions spaced apart from each other by the gate structure. The gate structure includes a gate dielectric layer in the second trench; a first metal layer on the gate dielectric layer; and a gate capping layer on the first metal layer. The gate dielectric layer includes D+ and ND2+ in an interface region, adjacent the first metal layer, and D is deuterium, N is nitrogen, and D+ is positively-charged deuterium.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.