Analog to digital converter
US11329663B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 21, 2018 |
| Grant date | May 10, 2022 |
| Priority date | — |
| Expiry date | Oct 6, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/494
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The invention relates to an analog-to-digital converter (ADC). The objective of the invention to have an analog-to-digital converter with the capability of non-equidistant sample time spacing and minimizing energy consumption will be solved by an apparatus comprising a sigma-delta modulator and a sample-time-counter, both controlled by a sample clock, a next-sample-time-computation unit configured to compute a sample-time-counter value when a next digital output sample is requested, a sample-computation-trigger unit connected to the next-sample-time-computation unit configured to compare an actual sample-time-counter value with the sample-time-counter value when the next digital output sample is requested and to trigger a computation unit for calculating a next digital sample when requested and by powering off the sigma-delta modulator in intervals where its delivered samples are not used for any computed decimator output sample. The objective is also solved by a method using the aforementioned analog-to-digital converter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.