Programmable system TDP with ASIC power capping
US11334103B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 18, 2020 |
| Grant date | May 17, 2022 |
| Priority date | — |
| Expiry date | Aug 18, 2040 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A programmable thermal dissipation power (TDP) system with integrated circuits is provided. The programmable TDP system includes a software interface, a monitoring circuit, and a controller circuit. The monitoring circuit may provide for the instantaneous input power supplied to the system. The controller circuit may monitor both the target TDP information specified from upstream and the input power readings. The controller circuit may generate a pulse-width modulation (PWM) signal that corresponds to a gap between the two power levels and sends the signal to the integrated circuits on the system. The integrated circuit may respond to the change in the input PWM signal and may adjust its power consumption. For example, the integrated circuit may adjust the clock frequency, adjust the instruction rate, skip a number of clock cycles, etc.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.