Patent · US Active

Modular interleaving techniques for scalable power electronics converter

US11334108B2 · kind B2 · utility

0Cited by
2References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 18, 2021
Grant dateMay 17, 2022
Priority date
Expiry dateMar 18, 2041

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K2005/00013
  • WIPO fieldElectrical machinery, apparatus, energy
  • WIPO sectorElectrical engineering

Abstract

A power management integrated circuit comprises a modular interleaved clock generator comprising a plurality of interconnected modular elements, each element constructed to generate and output a clock signal, and each one comprising: a phase port high input; a phase port low input; a clock input; and a bypass switch coupled between the phase port high input and the phase port low input, wherein in response to the bypass switch of at least one of the plurality of elements in a closed state, the phase port high inputs or the phase port low inputs of the remaining elements absent the at least one interleaving controller having the bypass switch in the closed state each receives a voltage that interleaves the clock signals output from the remaining active elements to have an interleaving arrangement that includes equal phase delays.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.