SDIO chip-to-chip interconnect protocol extension for slow devices and power savings
US11334402B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Jul 24, 2020 |
| Grant date | May 17, 2022 |
| Priority date | — |
| Expiry date | Jul 25, 2040 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of improving synchronization over a secure digital (SD) bus between an SD host and an SD client device is described. The method includes writing to a client event register to interrupt the SD host for an SD extended command. The method also includes triggering the SD host to issue the SD extended command to the SD client device over the SD bus in response to the SD client device writing to the client event register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.