Compound conditional reordering for faster short-circuiting
US11334469B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 13, 2018 |
| Grant date | May 17, 2022 |
| Priority date | — |
| Expiry date | Jun 14, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30058
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computing device is provided, including a processor configured to receive source code at a compiler. The source code may include at least one compound conditional having a plurality of conditions. For each condition of the plurality of conditions, the source code may further include a respective code block including instructions to evaluate the condition. For each ordering of a plurality of orderings of the plurality of conditions, the processor may determine that the ordering satisfies one or more legality constraints. For each ordering of the plurality of orderings that satisfy the one or more legality constraints, the processor may determine a respective estimated computational cost for that ordering. The processor may reorder the plurality of conditions to have an ordering that has a lowest estimated computational cost of the plurality of orderings that satisfy the one or more legality constraints.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.