Shift register unit, method of driving shift register unit, gate drive circuit, and display device
US11335293B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Feb 18, 2019 |
| Grant date | May 17, 2022 |
| Priority date | — |
| Expiry date | Jan 6, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A shift register unit, a method of driving a shift register unit, a gate drive circuit, and a display device are provided. The shift register unit includes an input circuit, an output circuit, a first reset circuit, and a reset control circuit. The input circuit is configured to control a level of a first node; the output circuit is configured to output a clock signal to an output terminal; the first reset circuit is configured to reset the first node; and the reset control circuit is configured to input the first reset signal to the first reset circuit in response to a reset control signal and a reference signal, to turn on the first reset circuit and the reset control circuit is further configured to enable an amplitude of a level of the first reset signal to be larger than an amplitude of a level of the reference signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.