Method of determining read reference voltage for blocks based on number of erroneous bits
US11335414B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 24, 2020 |
| Grant date | May 17, 2022 |
| Priority date | — |
| Expiry date | Apr 24, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5634
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for determining a reference voltage id disclosed. The method may include: reading data from a first flash memory page by using different reference voltages, and taking, as a first target reference voltage, one of the different reference voltages at which the first number of erroneous bits of the data that is read reaches a converegence value. The first flash memory page is any one of multiple flash memory pages of a flash memory block to be tested. The method may include adjusting the first target reference voltage to obtain second target reference voltages; and reading data from the flash memory pages by using the second target referece voltages, and taking, as a target reference voltage, one of the second target reference voltages at which the second number of erroneous bits of the data that is read is the smallest.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.