Thin film resistors of semiconductor devices
US11335635B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 8, 2020 |
| Grant date | May 17, 2022 |
| Priority date | — |
| Expiry date | Jun 18, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L25/043
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device is provided. A semiconductor device includes a first and a second region, a dielectric layer, a capping layer, and a planar resistive layer. The dielectric layer is arranged over the first and second regions and the capping layer is arranged over the dielectric layer. The capping layer has a substantially planar top surface over the first and second regions. The planar resistive layer is encapsulated within the capping layer in the first device region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.