Array substrate, display apparatus, and method of fabricating array substrate
US11335712B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 13, 2019 |
| Grant date | May 17, 2022 |
| Priority date | — |
| Expiry date | Feb 4, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/123
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An array substrate is provided. The array substrate includes a base substrate; a first bonding pad layer including a plurality of first bonding pads on a first side of the base substrate; a second bonding pad layer including a plurality of second bonding pads on a second side of the base substrate, wherein the second side is opposite to the first side; and a plurality of signal lines on a side of the second bonding pad layer away from the base substrate. A respective one of the plurality of second bonding pads extends through the base substrate to electrically connect to a respective one of the plurality of first bonding pads. The respective one of the plurality of first bonding pads includes a protruding portion protruding away from the first side of the base substrate along a direction from the second side to the first side.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.