Patent · US Active

Stacked integrated platform architecture

US11336285B2 · kind B2 · utility

0Cited by

1References

14Claims

0Family size

Inventors

Vishal FALDU · San Rafael, US
Budhadev Paul Chaudhuri · San Rafael, US
Renaud RENAULT · San Rafael, US
Oshiorenoya E. AGABI · Dublin, US

Key dates

Filing date	Aug 8, 2019
Grant date	May 17, 2022
Priority date	—
Expiry date	Aug 8, 2039

Classification

Technology area (CPC A)Human Necessities
CPC primaryA61N1/0546
WIPO fieldMeasurement
WIPO sectorInstruments

Abstract

Provided herein is a system comprising (1) a microelectrode array (MEA) component comprising an integrated multiplexed (MUX) logic circuit; and (2) a microprocessor, e.g., MOSFET, such as a CMOS, wherein the MEA is in electrical communication with the microprocessor such that signals produced by the microelectrodes are transmitted to the processor through the MUX. The use of a MUX reduces the number of outputs used to communicate signals from multiple microelectrodes to the microprocessor. The two components are removably engageable with each other such that after one or more uses, the engaged MEA can be removed and replaced with a new MEA, without the necessity of disposing the microprocessor.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.