Decision feedback equalizer
US11336491B2 · kind B2 · utility
1Cited by
3References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 11, 2019 |
| Grant date | May 17, 2022 |
| Priority date | — |
| Expiry date | Sep 11, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/372
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An amplifier output from an amplifier to an SR latch is used as a feedback signal through a buffer. An adder having a combination of an addition unit and an xh block is provided within the amplifier and transmits a feedback signal (analog signal) generated from the feedback signal FBD (digital signal) by the xh block to the addition unit and adds it to an output from a latch block. In the amplifier, the operation for adding the output from the latch block and the feedback signal occurs during a latch operation in the latch block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.