Transparent failover in a network interface controller
US11336508B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 2018 |
| Grant date | May 17, 2022 |
| Priority date | — |
| Expiry date | Jul 1, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/30
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A network interface apparatus includes a host interface for connection to a host processor and a network interface, which includes multiple distinct physical ports. Processing circuitry associates each of a plurality of virtual entities running on the host processor with a respective one of the physical ports, so that while both of the first and second physical ports are operational, the processing circuitry transmits data packets on behalf of first and second virtual entities, using assigned upper-layer addresses, through associated first and second physical ports. In response to an indication that the first physical port has ceased to operate, the processing circuitry transmits the data packets on behalf of the first virtual entity through the second physical port without changing the upper-layer addresses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.