Patent · US Active

Apparatus and method using triangle pairs and shared transformation circuitry to improve ray tracing performance

US11341709B2 · kind B2 · utility

1Cited by

1References

24Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Sven Woop · Völklingen, DE
Prasoonkumar Surti · Folsom, US
Karthik Vaidyanathan · San Francisco, US
Carsten Benthin · Großrosseln, DE
Joshua Barczak · Timonium, US
Saikat Mandal · Sacramento, US

Key dates

Filing date	Sep 27, 2019
Grant date	May 24, 2022
Priority date	—
Expiry date	Sep 27, 2039

Classification

Technology area (CPC G)Physics
CPC primaryG06T2210/21
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An apparatus and method for merging primitives and coordinating between vertex and ray transformations on a shared transformation unit. For example, one embodiment of a graphics processor comprises: a queue comprising a plurality of entries; ordering circuitry/logic to order triangles front to back within the queue; pairing circuitry/logic to identify triangles in the queue sharing an edge and to merge the triangles sharing an edge to produce merged triangle pairs; and shared transformation circuitry to alternate between performing vertex transformations on vertices of the merged triangle pairs and to performing ray transformations on ray direction/origin data.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.